
Sam Tazik here. I spend a lot of time thinking about how fragile our tech infrastructure really is. We tend to treat semiconductors like magic—they show up in our phones, cars, and coffee makers without us ever seeing the factory. But behind that magic is a supply chain with the elegance of a Jenga tower. And right now, a few specific points in that tower are holding up nearly everything.
The chip shortage of 2021-2023 wasn’t just a pandemic hiccup. It was a stress test that revealed a structural weakness: extreme concentration. When one factory in Taiwan, one Dutch equipment maker, or one Japanese chemical plant stumbles, the entire global electronics industry feels it. This isn’t a theoretical risk. It’s a design flaw we’ve built into the foundation of modern technology.
The Geography of Fragility
Most people know that chips are made in Asia. But the specifics matter. Taiwan Semiconductor Manufacturing Company (TSMC) produces roughly 90% of the world’s most advanced logic chips. Not 50%, not 70%—ninety. These are the chips that go into your smartphone, your laptop, and increasingly your car’s driver-assistance systems. If TSMC’s fabs in Hsinchu or Tainan go offline for any reason—earthquake, geopolitical conflict, power outage—there is no backup. Samsung’s foundries in South Korea can pick up some slack, but they don’t have the same capacity or process maturity for the advanced nodes Apple, AMD, and Nvidia rely on.

The geographic concentration goes deeper. A single facility in Taiwan’s Science Park produces over half of the world’s silicon wafers—the literal foundation every chip is built on. That facility belongs to GlobalWafers and a few other firms, all clustered within a few kilometers of each other. One major seismic event in that corridor, and the pipeline of raw wafers to every fab on Earth dries up. The 1999 Chi-Chi earthquake already showed us a preview: fabs shut down, prices spiked, and lead times stretched for months.
The Lithography Chokepoint
Even if you could magically build a state-of-the-art chip factory in Ohio tomorrow, you’d still face a single point of failure: the machines that print the chip designs onto silicon. ASML, headquartered in the Netherlands, is the only company on the planet that makes extreme ultraviolet (EUV) lithography machines. These machines are necessary to produce chips at 7nm and below. They cost over $150 million each, contain hundreds of thousands of components sourced globally, and ASML ships only a few dozen per year.
ASML’s monopoly isn’t accidental. It’s the result of decades of R&D, a complex web of exclusive supplier relationships, and physics that are incredibly difficult to replicate. Carl Zeiss provides the mirrors, Trumpf supplies the lasers, and no other consortium has come close. That means every advanced chip on Earth traces back to a single company’s cleanroom in Veldhoven. If ASML has a production delay—or if export controls tighten further—the entire semiconductor roadmap slows down.
Why Can’t Someone Else Build EUV Machines?
The short answer is that the technical barrier is almost absurd. EUV light has a wavelength of 13.5 nanometers, which is absorbed by air and glass. The system has to operate in a vacuum, use mirrors instead of lenses, and fire a droplet of tin with a laser 50,000 times per second to generate the light. Nikon and Canon tried to compete and essentially gave up. The capital investment required to catch up with ASML now would be staggering, and the talent pool is tiny. It’s a natural monopoly that has become a structural risk.
Specialty Chemicals and Substrates: The Unseen Bottlenecks
Most of the attention goes to fabs and lithography, but chip manufacturing depends on a supply chain of ultra-pure chemicals and specialized materials that is just as concentrated. For example, high-purity hydrogen fluoride—used for etching silicon—is dominated by a few Japanese and Chinese producers. In 2019, when Japan tightened export controls on these chemicals to South Korea, the panic was immediate. Samsung and SK Hynix saw their production plans thrown into chaos overnight.

Then there are ABF substrates—the thin layers that connect a chip to a circuit board. These substrates are essential for high-performance computing chips, and the supply is dominated by a small group of Japanese and Taiwanese companies like Unimicron and Ibiden. A fire at a single Unimicron plant in 2020 tightened supply for over a year. When you’re talking about a component that goes into every server CPU and GPU, that’s not a minor disruption.
The Testing and Packaging Pinch
After a chip is fabricated, it still needs to be tested, cut from the wafer, and packaged. Advanced packaging techniques—like the ones that let AMD stack chiplets or Apple integrate memory on-package—are concentrated in a few facilities, mostly in Taiwan and Malaysia. These processes are less glamorous than EUV, but they’re no less essential. During the pandemic, lockdowns in Malaysia’s packaging hubs caused lead times to stretch from weeks to months for commodity chips used in cars and industrial equipment. The lesson: you can have a perfect wafer full of perfect chips, and it’s worthless if you can’t package and ship it.
Why Market Forces Haven’t Fixed This
You might wonder why competition hasn’t naturally diversified these bottlenecks. The market should, in theory, reward anyone who can offer a reliable second source. But semiconductor manufacturing has brutal economies of scale. A new leading-edge fab costs $20 billion or more. A new EUV machine program would cost tens of billions with no guarantee of success. And the chemical and substrate suppliers operate on thin margins with exacting quality requirements that take decades to perfect. The barriers aren’t just high; they’re practically a cliff face.
Governments have noticed the problem and started throwing subsidies at domestic chip production—the U.S. CHIPS Act, the European Chips Act, similar efforts in Japan and India. But throwing money at fabs doesn’t solve the equipment, chemical, and substrate concentration. TSMC’s new Arizona fab will still rely on ASML machines, Japanese chemicals, and probably Taiwanese packaging partners. It spreads geography risk slightly but doesn’t touch the deeper single-point failures.
The Real-World Failure Scenarios
Let’s get specific about what these single points of failure mean in practice. I’m not talking about abstract supply chain theory. I’m talking about concrete scenarios that keep operations managers up at night.
Scenario 1: Taiwan Strait disruption. If a conflict or even a prolonged blockade interrupts shipping from Taiwan, the world loses access to TSMC’s advanced fabs, the wafer suppliers, and a chunk of the packaging ecosystem. No amount of inventory would buffer that. The global electronics industry would stall within weeks.
Scenario 2: ASML production halt. A fire or cyberattack at ASML’s Veldhoven facility could delay EUV machine deliveries for a year. Since fabs are constantly upgrading and expanding, that delay would ripple through the entire industry’s capacity plans. You can’t just switch to older lithography tools for 5nm chips.
Scenario 3: Chemical export freeze. A repeat of the 2019 Japan-Korea dispute, but broader, could starve multiple fabs of essential etching gases. These materials have a limited shelf life and are consumed continuously. Stockpiling helps, but only for a few months.
None of these are doomsday fantasies. Each has a historical precedent that was smaller in scale but revealing in impact.
What Engineers and Procurement Teams Can Actually Do
I’m not a fan of hand-wringing without actionable thinking. So what can a company that designs or depends on chips actually do? The options are limited but real.
Design for flexibility. Where possible, design products so they can accept alternative chips with minimal requalification. This is easier for less complex components like power management ICs than for an application processor, but even partial flexibility helps.
Buffer long-lead-time components. Holding six months of inventory for a specific ASIC is expensive and risky if the design changes. But for standard parts with stable demand, strategic stockpiling is a reasonable insurance policy.
Map your own supply chain deep tiers. Most companies know their direct suppliers. Few know where those suppliers get their chemicals, substrates, and equipment. That deep-tier mapping is tedious but essential to spot single points of failure before they hit you.
Qualify alternative packaging sites. Even if your chip is fabbed at TSMC, can it be packaged in a different facility in a different country? The overhead is high, but for safety-critical or high-revenue products, it’s worth exploring.
FAQ
Why can’t older chip factories fill the gap when advanced fabs go offline?
Older fabs use larger process nodes—think 28nm or 45nm instead of 5nm. The chips made at those nodes are physically larger, slower, and less power-efficient. A smartphone processor designed for 5nm can’t simply be re-targeted to 28nm without a complete redesign, and the performance would be unacceptable. You can shift simpler chips—like microcontrollers for cars—between older and newer fabs, but the most advanced logic has no fallback.
Does the concentration risk apply to memory chips as well?
Memory chips—DRAM and NAND flash—are less concentrated than advanced logic, but still heavily clustered. Samsung, SK Hynix, and Micron dominate DRAM, with most production in South Korea and Taiwan. NAND is similarly concentrated among a handful of players. The memory market has a history of boom-bust cycles and supply shocks, but the geographic diversity is slightly better because Micron operates fabs in the U.S. and Singapore. Still, a major disruption in South Korea would be felt globally within weeks.
How long would it realistically take to rebuild a more balanced supply chain?
We’re talking decades, not years. A new leading-edge fab takes 3-5 years to build and qualify. An EUV lithography competitor would need at least a decade of R&D before shipping a production-ready machine, assuming the talent and capital were available. And the chemical and substrate expertise is built through generations of process engineering. Governments tend to announce ambitious timelines, but the physical and human capital constraints are stubborn. The concentration we have today is the result of 30 years of specialization; unwinding it will take at least that long, even with focused effort.
The chip supply chain isn’t just global—it’s globally lopsided. A few corridors, a few companies, and a few machines stand between us and a world where electronics production grinds to a halt. Recognizing that isn’t alarmist. It’s the first step toward building systems that can survive the inevitable shocks.